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The European logarithmic microprocessor

Lookup NU author(s): Dr Nick Coleman

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Abstract

In 2000 we described a proposal for a logarithmic arithmetic unit, which we suggested would offer a faster, more accurate alternative to floating-point procedures. Would it in fact do so, and could it feasibly be integrated into a microprocessor so that the intended benefits might be realised? Herein we describe the European Logarithmic Microprocessor, a device designed around that unit, and compare its performance with that of a commercial superscalar pipelined floating-point processor. We conclude that the experiment has been successful; that for 32-bit work logarithmic arithmetic may now be the technique of choice. © 2008 IEEE.

Publication metadata

Author(s): Coleman JN, Softley CI, Kadlec J, Matousek R, Tichy M, Pohl Z, Hermanek A, Benschop NF

Publication type: Article

Publication status: Published

Journal: IEEE Transactions on Computers

Year: 2008

Volume: 57

Issue: 4

Pages: 532-546

Print publication date: 01/04/2008

ISSN (print): 0018-9340

ISSN (electronic): 1557-9956

Publisher: IEEE

URL: http://dx.doi.org/10.1109/TC.2007.70791

DOI: 10.1109/TC.2007.70791

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