Toggle Main Menu Toggle Search

Open Access padlockePrints

The Newcastle University research output collection, currently available on ePrints, will shortly be moving to a new open repository platform, Figshare. To prepare for the data migration we have paused adding new content to ePrints, and will resume once the new repository is launched. During this time you will continue to have access to ePrints (but no new content will appear). We will share updates here when available.

CLARINET: A quire-enabled RISC-V-based framework for posit arithmetic empiricism

Lookup NU author(s): Dr Farhad Merchant

Downloads

Full text for this publication is not currently held within this repository. Alternative links are provided below where available.

Abstract

Many applications require high-precision arithmetic. IEEE 754-2019 compliant (floating-point) arithmetic is the de facto standard for performing these computations. Recently, posit-arithmetic has been proposed as a drop-in replacement for floating-point arithmetic. The posit data representation and arithmetic claim several advantages over the floating-point format and arithmetic, including higher dynamic range, better accuracy, and superior performance-area trade-offs. However, very few accessible and holistic frameworks facilitate the validation of these claims of posit-arithmetic, especially with long accumulations (quire).We present a consolidated general-purpose processor-based framework to support posit-arithmetic empiricism. Users can seamlessly experiment using posit and floating-point arithmetic in their applications since the framework is designed for the two number systems to coexist. Melodica is a posit-arithmetic core that implements parametric fused operations on the quire data type. Clarinet is a Melodica-enabled processor based on the RISC-V ISA. To the best of our knowledge, this is the first-ever integration of the quire in a RISC-V core. We report results from application studies on Clarinet and benchmark common linear algebra and computer vision kernels. We synthesize Clarinet on a Xilinx FPGA and present utilization and timing data. Clarinet and Melodica remain actively under development and are available as open-source.

Publication metadata

Author(s): Sharma NN, Jain R, Pokkuluri MM, Patkar SB, Leupers R, Nikhil RS, Merchant F

Publication type: Article

Publication status: Published

Journal: Journal of Systems Architecture

Year: 2023

Volume: 135

Print publication date: 01/02/2023

Online publication date: 01/12/2022

Acceptance date: 29/11/2022

ISSN (print): 1383-7621

ISSN (electronic): 1873-6165

Publisher: Elsevier BV

URL: https://doi.org/10.1016/j.sysarc.2022.102801

DOI: 10.1016/j.sysarc.2022.102801

Altmetrics

Altmetrics provided by Altmetric

Share