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Formal Verification of Signalling Programs with SafeCap

Lookup NU author(s): Dr Alexei Iliasov, Dr Linas Laibinis, Emeritus Professor Alexander RomanovskyORCiD

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Abstract

© 2018, Springer Nature Switzerland AG. SafeCap is a modern toolkit for modelling, simulation and formal verification of railway networks. This paper discusses the use of SafeCap for formal analysis and fully-automated scalable safety verification of solid state interlocking (SSI) programs – a technology at the heart of many railway signalling solutions. The focus of the work is on making it easy for signalling engineers to use the developed technology and thus to help with its smooth industrial deployment. In this paper we explain the formal foundations of the proposed method, its tool support, and their application to real life railway verification problems.

Publication metadata

Author(s): Iliasov A, Taylor D, Laibinis L, Romanovsky A

Publication type: Conference Proceedings (inc. Abstract)

Publication status: Published

Conference Name: SAFECOMP 2018 International Conference on Computer Safety, Reliability and Security

Year of Conference: 2018

Pages: 91-106

Online publication date: 17/08/2018

Acceptance date: 02/04/2018

Publisher: Springer Verlag

URL: https://doi.org/10.1007/978-3-319-99130-6_7

DOI: 10.1007/978-3-319-99130-6_7

Library holdings: Search Newcastle University Library for this item

Series Title: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

ISBN: 9783319991290

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